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March 14-16,2018
Shanghai New International Expo Centre

Symposium IX: Circuit Design, Systems and Applications


(** to designate keynote talk, * to designate invite talk)

Sunday, March 12, 2017 Shanghai International Convention Center
Meeting Room: 3E
 
Session I: Emerging Technologies
Session Chair: Weikang Qian / Guojie Luo


13:30-13:35 Chairman Remarks
   
**13:35-14:05 Exploiting Ferroelectric FETs: Faster and Cooler Non-Volatile Logic-In-Memory and Beyond
  Sharon Hu, University of Notre Dame
**14:05-14:35 Harnessing spintronics technologies in emerging systems
  Sachin Sapatnekar, Univ. of Minnesota
**14:35-15:05 Statistical Analysis and Optimization for Nanoscale Analog Integrated Circuits
  Xuan Zeng, Fudan University
*15:05-15:25 TSV Inductor Optimization and Its Design Implication
  Cheng Zhuo, Zhejiang University
15:25-15:40 Coffee Break
   


Session II: Design / Synthesis with Advanced Technologies
Session Chair: Yiyu Shi / Cheng Zhuo


**15:40-16:10 Variation and Power Mode Aware Clock synthesis
  Shih-Chieh Chang, National Tsing Hua University
*16:10-16:30 Design and Synthesis of Approximate Computing Circuits
  Weikang Qian, The University of Michigan - Shanghai Jiao Tong University Joint Institute
*16:30-16:50 A Distributed Parameter Tuning System for FPGA Synthesis
  Guojie Luo, Peking University
*16:50-17:10 Energy Efficient SoC Power Delivery using Fully-Integrated Voltage Regulators with High-Frequency Switch Control
  Boping Wu, Intel Corp.
   
Poster Session: Location: Foyer of Yangtze River Hall
Coffee Break Evaluation of Ultra-low Power Tunneling Field Effect Transistor Power Management Unit
  LU HAIFANG, Peking University
  Design and Implementation of a digital HBC coordinator for Body Area Network
  Ying Zhang, The Key Lab of Integrated Microsystems Peking University Shenzhen Graduate School
  The Design and Implementation of A Reconfigurable Convolution Operator based on APU
  YuQian Huang, Peking University
  Hybrid Thermal Aware Reconfigurable 3D IC with Dynamic Power Gating Architecture
  Tianchen Wang, University of Notre Dame
  A novel OLED-on-silicon microdisplay drive circuit with the digital analog hybrid scan strategy
  Yongnan Chu, Microelectronic Research and Development Center, Shanghai University
  A Concise and Precise Model of the Gate Delay for EDA Simulation
  Tao Su, Sun Yat-sen University
  Design of A Novel AC LED Driver with no Current Glitch Based on Soft Switching operation
  Yang Boxin, South China University of Technology
  High Performance Single Phase Full Bridge Inverter Using GaN FETs
  Wu Chih-Chiang, National Chiao Tung University
  The air quality evaluation based on gas sensor array
  Chang-yong Chiu, Shenzhen University
  DESIGN AND IMPLEMENTATION OF A HIGH QUALITY R-PEAK DETECTION ALGORITHM
  Zhong-Min Lin, Peking University Shenzhen Graduate School


Monday, March 13, 2017 Shanghai International Convention Center
Meeting Room: 3rd Floor Yellow River Hall 黄河厅

Session III: DTCO Joint session ( II & XI)
Session Chair: Yiyu Shi / Leo Pang


8:30-8:35 Opening Remarks
  Yiyu Shi
**8:35-9:05 Design Technology Co-optimization for Disruptive Patterning Schemes
  Puneet Gupta, UCLA
**9:05-9:35 Software Defined Chip: Technologies, Challenges and Opportunities
  Shaojun Wei, Tsinghua University
*9:35-9:55 Data Analytics and Machine Learning for Design-Process-Yield Optimization in Electronic Design Automation and IC Semiconductor Manufacturing
  Luigi Capodieci, Motovi.ai
9:55-10:10 Coffee Break
   


Session IV: Reliability / Manufacturability / Testing

Meeting Room: 3E
Session Chair: Boping Wu / Yiyu Shi

*10:10-10:30 An Accurate Interconnect Test Structure for Parasitic Validation
  Chun-Chen Liu, Univ. of California, Los Angeles
*10:30-10:50 Design Automation and Test for Flow-Based Microfluidic Biochips
  Hailong Yao, Tsinghua University
*10:50-11:10 Exploiting Distribution of Unknown Values in Test Responses to Optimize Test Output Compactors
  Shu-Min Li, National Sun Yat-sen University
11:10-11:25 Geometry Effect with Respect to ESD and Radiative Charged Particles in SoC
  C.-Z. Chen and David Y. Hu, Qualchip Technologies & MetroSilicon Microsystems
11:25-11:40 A Low Noise SPAD Pixel Array with Analog Readout Mode
  Ruiming Luo, Nanjing University of Posts and Telecommunications
11:40-11:55 A NOVEL FMEA TOOL APPLICATION IN SEMICONDUCTOR MANUFACTURE
  Lijuan Sun, Semiconductor Manufacturing International Corporation
11:55-13:30 Lunch Break
   

Session V: Machine Learning/Internet of Things
Session Chair: Cheng Zhuo / Chun-Chen Liu


**13:30-14:00 Machine Learn on Chip, Hope or Hype for Next Killer Application?
  Lei He, Univ. of California, Los Angeles
*14:00-14:20

PDMS based wearable sensors for healthcare monitoring”

 

Sujie Chen, Shanghai Jiaotong University

*14:20-14:40

Low-power and robust integrated circuits with carbon nanotube transistors promising for deep-nano IoT

 

Prof. Yanan Sun, Shanghai Jiaotong University

*14:40-15:00 How Secure is Split Manufacturing in Preventing Hardware Trojan?
  Pingiang Zhou, Shanghai Tech
*15:00-15:20

An FPGA-Based System for Massive ECG Data Analysis

 

Yongxin Zhu, Shanghai Jiaotong University

*15:20-15:40 VLSI Layout Hotspot Detection: From Feature Optimization, Machine Learning, to Deep Learning
  Bei Yu, Chinese University of Hong Kong
15:40-15:55 Coffee Break
   

Session VI: Sensors / Vacuum Reactors
Session chair: Guojie Luo / Weikang Qian


15:55-16:10 Ka-band Low Noise Amplifier Using 70nm MHEMT Process for Wideband Communication
  Xu Cheng, Microsystem and Terahertz Center
16:10-16:25 Design of K / Ka-band Passive HEMT SPDT Switches with High Isolation
  Liang Zhang, Microsystem & Terahertz Research Center, China Academy of Engineering Physics
16:25-16:40 The Multi-Segment Adapitve Control Of The High-Temperature Heat Source In a MOCVD Vacuum Reactor
  Jung- Ching Chiu, National Central University
16:40-16:55 The application of a heating baffle in a high temperature vacuum reactor
  Kuei-Fang Chen, National Central University