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March 14-16,2018
Shanghai New International Expo Centre

Symposium IV: Thin Film, Plating and Process Integration


(** to designate keynote talk, * to designate invite talk)

Sunday, March 11, 2018 Shanghai International Convention Center
Meeting Room:5th Floor Yangtze River Hall长江厅

Session I: Integration -- FEOL
Session Chair: Zhen Guo
 
**13:30-14:00 Extension of 14nm FinFET Technology with High Performance, Ultra Low Power and High Density for Different Applications
  Owen Hu, Global fundry
*14:00-14:25 All-ALD high-k/metal gate as an enabler for FinFETs and nanowire FETs
  Zhao Chao, IME
14:25-14:40 Investigation on The Leakage of Triple Split-gate Flash Device And Its Improve Solution
  Zigui Cao, HHGrace
14:40-14:55 Hybrid Integration of FDSOI and Si Bulk for CMOS Process
  Song Yang, Huali
14:55-15:25 Coffee Break
   

Session II: Integration -- BEOL
Session Chair: Zhao Chao

**15:25-15:55 Materials/Process Innovations required for High Performance BEOL interconnects
  Griselda Bonilla, IBM
*15:55-16:20 Patterning Challenges in 193i-based Tip to Tip in N5 Interconnects
  Basoene Briggs, IMEC
*16:20-16:45 Metal Interconnect Considerations for Logic 5 nm Node and Beyond
  Steve Lai, Lam Research
16:45-17:00 A Particle Free Method to Monitor Aktiv Pre-Clean in Barrier & Seed Process
  Qintong Zhang, SMNC
17:00-17:15 Characteristic and Applications in Copper Interconnect of TaN Deposited by Atomic Layer Deposition
  Aiji Wang, SMNC
   
Poster Session: Location: 5th Floor    
Coffee Break Optimization of backside metal deposition in power IC process for suppression of wafer warpage and film peeling issue
  Rick Zhang, SMIC
  A technique for improving contact filling with aluminum
  Chunling Liu, HHGrace
  Emitter-Base Short Issue Study and Improvement in a Low Cost and High Performance 0.18um SiGe BiCMOS Process
  Donghua Liu, HHGrace
  Advanced Mass Flow Controllers (MFC) with EtherCAT Communication Protocol and Embedded Self Diagnostics
  Kevin Findleton, Brooks Instrument
  Fin Doping for 14nm FinFET Technology
  Shanrong Li, SMIC
  The Study of TiN Residues Formation Mechanism and Removal Solution on Bondpad Surface in PI/PA Mask Combined Process
  Xu Jie, HHGrace
  MANAGEMENT OF TEOS-CVD PROCESS TOOL EXHAUSTS IN 3D-NAND MANUFACTURING
  Andrew Chambers, Edwards Ltd
  Hydrogen Based High Strain Si:P Epitaxy Process Development and Optimization
  Jin Yang, AMAT
  Aktiv(APC) Preclean Application for Advanced Copper Metallization
  Guilong Wu, Liechao Luo, Weiye He, Lei Zhang, Qingshan Zhang, Qingxia Fan, Jian Kang, AMAT
  Hardmask TiN Stress Analysis and Effect on Back of End Line Integration
  Qingshan Zhang, AMAT
  Improving PVD W Adhesion
  Lei Zhang, AMAT


Monday, March 12, 2018 Shanghai International Convention Center
Meeting Room: 5th Floor Yangtze River Hall长江厅

Session III: Thin Film -- FE / ALD
Session Chair: Beichao Zhang 
 
**8:30-9:00 Plasma enhanced ALD technology & worldwide applications
  Toshihisa Nozawa, ASM, VP
*9:00-9:25 Thin Film Process Technologies for Continued Scaling
  Robert Clark, TEL
*9:25-9:50 Overview of ALD Applications for Advanced CMOS Technology
  Xiaoping Shi, Naura
9:50-10:05 Conformal SiGe selective epitaxial growth for advanced CMOS technology
  Yiqun Liu, SMIC
10:05-10:20 Effect of Additional N2 Flow on Surface Particle Reduction for HARP-STI Process
  Bin Wu, SMNC
10:20-10:35 Coffee Break
   

Session IV: Thin Film -- BE / Plating
Session Chair: Huang Liu

**10:35-11:05 Co alloy for Middle of Line for Fin FET of sub-7 nm
  Junichi Koike, Tohoku University
*11:05-11:30 Electrochemical ALD - A New Paradigm for Enabling Aggressive Scaling in BEOL Interconnect Metallization
  Yezdi Dordi, Lam Research
11:30-11:45 Effect of Idle Time on the Property of Ultra Low-k Dielectric Film
  Wenrong Hou, SMNC
11:45-12:00 Effect of Bridging and Terminal Alkyl Groups on Critical Properties of Porous OSG Low-k films
  Jing Zhang, North China University of Technology
12:10-13:30 Lunch Break
   

Session V: Thin Film -- Others
Session Chair: Xiaoping Shi

*13:30-13:55 Low Temperature Microwave Annealing for CMOS Scaling
  Bharat Krishnan / Rinus T.P. Lee, Global fundry
*13:55-14:20 In-situ plasma monitoring of PECVD nano-crystalline a-Si:H(i)/ a-Si:H (n) surface passivation for Heterojunction Solar cells Application
  Tomi Li, National Central University
*14:20-14:45 PVD Systems for Advanced Packaging Applications
  Peijun Ding, Naura
14:45-15:00 The Morphological evolution of Aluminum Whisker Defect Etched by Cl2 gas and its Reduction Method in 12-inch wafers
  Han Zhang, SMNC
15:00-15:15 Coffee Break
   

Session VI: New technology
Session Chair: Larry Zhao

**15:15-15:45 Fully Printable and Autonomously Powered Electronic Nodes for the Internet of Everything
  Paul Berger, Ohio State University
*15:45-16:10 Flexible Silicon/Germanium Nanomembranes for Integrative 3D Devices
  Yongfeng Mei, Fu Dan University
16:10-16:25 Advanced ion beam technology to trim surfaces in the 0.1nm range
  Sebastian Gatz, Meyer Burger AG
16:25-16:40

The proposal and application of the hole Smoluchowski effect to explain the current-voltage characteristics of 

high-k MIM capacitors

  Wai Shing Lau, Zhejiang University
16:40-16:55

Engineering implication of the correlation between the leakage current in high-k dielectric materials and the electronic 

defect states detected by zero-bias thermally stimulated current spectroscopy

  Wai Shing Lau, Zhejiang University