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Dr. Jeorge S. Hurtarte Sr. Director, SOC Product Strategy, Teradyne Inc. 泰瑞达SOC产品战略高级总监和首席营销策略师 |
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讲师简介 / Speaker Bio Dr. Jeorge Hurtarte is Senior Director, SoC Product Strategy and Principal Product Strategist, at Teradyne. Jeorge has held various technical, management and executive positions at Teradyne, Lam Research, LitePoint, TranSwitch, Rockwell Semiconductors, and Johnson Controls. He holds PhD and B.S. degrees in electrical engineering, a M.S. in Telecommunications, M.S. in Computer Science, and an M.B.A. He is also a graduate of Harvard Business School's Advanced Management Program for executives. Jeorge has served in the Advisory Board of SEMI North America, the Global Semiconductor Alliance, TUV Rheinland of North America, and the NSF's Wireless Internet Center for Advanced RF Technology. Jeorge is currently the co-chair of the IEEE Heterogeneous Integration Roadmap (HIR) Test Working Group. Dr Hurtarte is also a visiting professor at the University of California, Santa Cruz, and at the University of Phoenix. He is also the lead co-author of the book Understanding Fabless IC Technology. 摘要 / Abstract As the semiconductor industry moves into the AI era, new test challenges are emerging related to Advanced Digital, co-packaged optics, and heterogeneous integration of chiplets in advanced 2.5D/3D packages. These unique test challenges require innovative test solutions to balance the cost of test with the required quality levels for high performance computing in applications such as data centers and smart cars. This presentation provides an overview of these market trends, test challenges, and innovation required to address those test challenges. |
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