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Chinese
2020年3月18-20日
上海新国际博览中心

主题与特邀演讲嘉宾

Keynote & Invited Speakers(2020)
               
TBD
Dr. Doug Yu, Vice President, TSMC
     
EUV Lithography – the Road to High-Volume Manufacturing
Dr. Anthony Yen, Vice President, ASML
   
                 
                 
Partial List of other Confirmed Distinguished CSTIC 2020 Invited Speakers
                 
Embedded ReRAM technology and neuromorphic application
Dr. Takumi Mikawa, Senior Manager, Panasonic Semiconductor Solution
     
Symmetric Lateral Bipolar on SOI - An Ideal Device Platform for Universal RAM
Dr. Tak H. Ning, IBM Fellow (retired)
   
                 
Nanowire & Nanosheet FETs for Advanced Ultra-Scaled, High-Density Logic and Memory Applications
Dr. Anabela Veloso, Principal Member of Technical Staff, IMEC
             
                 
Considerations of missing hole defect in EUV patterning
Hidetami Yaegashi, Chief Engineer, TEL
        TBD
Mingqi Li, Principal Research Scientist, DuPont Electronics and Imaging
 
                 
  Novel Spin on Planarization Technology by Photo Curing SOC
Hikaru Tokunaga, Senior Engineer, Nissan Chemicals
     
Etch Proximity Correction Based on Machine Learning
Rui Chen, Associate Professor, IMECAS
 
                 
Challenge of High Power LPP-EUV Source with Long Collector Mirror Lifetime for Semiconductor HVM
Hakaru Mizoguchi, Exective Vice President and CTO, Gigaphoton
           
                 
TBD
Hiroshi Matsumoto, Chief Specialist, NuFlare
        TBD
Kazuhiro Takahashi, Canon
 
                 
  TBD
Mamsami Ikota, Senior Engineer, Hitachi High Tecnologies
     
Full Chip Curvilinear ILT in a Day
Leo Pang, Chief Product Officer and VP, D2S
 
                 
  TBD
Xianggui Ye
     
TBD
Zhimin Zhu, Sr. Scientist, Brewer Science
 
                 
  TBD
Steffen Schulze, VP of Calibre Product Management, Mentor Graphics
        TBD
ASML/ICRD
 
                 
TBD
Will Conley, Application Manager, Cymer
     
Advanced Lithography Material Status toward 5nm Node and beyond
Kouichi Fujiwara, General Manager, JSR(Shanghai)Co.,Ltd.
 
                 
Challenges and Solutions in perpendicular STT-MRAM manufacturing
Dongchen Che, Senior Process Manager, Leuven Instruments
        Patterning of 3D Fin-Gate features at deeply scaled dimensions
Dr. Liping Zhang, R&D engineer, IMEC
   
                 
TBD
Michael Chu, Senior Vice President of Global Business, AMEC
             
                 
Fabrication and Performance Trade-offs of Future Interconnect Design and Material Options
Dr. Jonathan Reid, Fellow, Lam Research
     
Enabling CMOS Logic Technology Scaling beyond FinFETs
Dr. Bu Huiming, Director, IBM Research
   
                 
PECVD and PEALD Low-k Silicon Carbonnitride Films for Microelectronic Applications
Prof. Jim Leu, Professor, National Chiao Tung University
     
Design & Technology Co-Optimization in Advanced Node
Dr. AbdelKarim Mercha, Technical Director, IMEC
   
                 
Film for Advanced Patterning and Profile Control
Li Ming, Vice President, Lam Research
     
Evolution of FINFETS and The Role of Thin Films
Dr. Rishikesh Krishnan, Senior Technologist, IBM
   
                 
BEOL Interconnect Challenges and Solutions for Advanced Technology Node
Dr. Zhu Huanfeng, Technologist, Lam Research
        Emerging Memories and their Opportunities
Tseng Chiahsun, China Technical Director, AMAT
   
                 
Challenges in Dielectric Film Deposition
Xianyuan Li, Technology Director, AMAT
     
Mechanically Stable Ultra-low k dielectric and Air-gap technology
Dr. Mansun Chan, Chair Professor, The Hong Kong University of Science and Technology
   
                 
  Beyond Silicon: Low-dimensional Nanoelectronics
Dr. Shu-Jen Han, Director, HefeChip
             
                 
Exploring Aggressive BEOL Scaling Using Electrochemical ALD and ALE of Interconnect Materials
Prof. Rohan Akolkar, Professor, Case Western Reserve University
     
Process Innovations for Semiconductor Technology using Area Selective Atomic Layer Deposition
Prof. Stacey F. Bent, Professor, Stanford University
   
                 
TBD
Dr. Bo Zheng, Sr. Principal Design Engineer, ARM
             
                 
Pattern loading effect optimization of BEOL Cu CMP in 14nm technology node
Zhang Lei, Principal Engineer, HLMC
     
STOP ON NITRIDE SLURRY DEVELOPMENT
Dr. Shoutian Li, Senior Manager, Anji Microelectronics
   
                 
Solving CMP challenges for chemically stable materials and 3D shapes
Dr. Hitoshi Morinaga, Senior General Manager, FUJIMI Incorporated
        In-situ end point detection and dynamic profile tuning (DPT) for CMP process
Dr. Tongqing Wang, Professor, Tsinghua University
   
                 
  Modeling of chemical mechanical polishing incorporating the effect of micro contact of polishing pad
Dr. Ping Zhou, Associate Professor, Dalian University of Technology
             
                 
TBD
Prof. Ramesh Karri, Professor, New York University
     
TBD
Prof. Shawn Blanton, Professorr, Carnegie Mellon University
   
                 
Machine and Deep Learning for Metrology of Process Control
Dr. Shay Wolfling, CTO, Nova Measuring Instrument
     
TBD
Dr. Tung-Yang Chen, President, AIP Technology
   
                 
E-Beam Inspection challenge for new technology node and new opportunity
Dr. Wei Fang, Senior Director, ASML
             
                 
Overview of Various Approaches Toward Area Selective Deposition
Prof. Woo-Hee Kim, Assistant Professor, Hanyang University
     
Synthesis and applications of versatile 2-dimensional semiconductor materials
Prof. Ji Hoon Ahn, Associate Professor, Hanyang University
   
                 
Surface chemistry analysis of atomic layer deposition processes
Prof. Bonggeun Shong, Assistant Professor, Hongik University
     
3D Heterogeneous Integration
Dr. Bill Bottoms, Chairman and CEO, 3MTS
   
                 
  TBD
Prof. Pol Van Dorpe, IMEC
        Spectral sensor devices for online process measurement
Ray Saupe, Researcher/Project manger, Fraunhofer ENAS
   
                 
  Silicon based nanopore and its application potential
Prof. Zewen Liu, Tsinghua University
             
                 
Minimum Energy Operation of Voltage-Scaled Circuits
Prof. Hidetoshi Onodera, Professor, Kyoto University
        Monolithic 3D enabled Processing-in- SRAM Memory
Prof. Vijaykrishnan Narayanan, Distinguished Professor, Pennsylvania State University
   
                 
TBD
Prof. Xin Li, Professor, Duke University
     
TBD
Prof. Ulf Schlichtmann, Professor, Technical University of Munich
   
                 
Sign-Off Level Full Chip ESD/Reliability Design Verification In Logical Driven Layout Static Approach
Dr. Frank Feng, Director, Mentor
     
TBD
Prof. Hai Wang, Associate Professor, the University of Electronic Science and Technology of China
   
                 
TBD
Prof. Yu-Guang Chen, Assistant Professor, National Central University
     
TBD
Prof. Yibo Lin, Assistant Professor, Peking University
   
                 
  TBD
Prof. Youngcheol Chae, Yonsei University
        TBD
Prof. Jose Silva-Martinez, IEEE Fellow, Texas A&M University
   
                 
Confirmed Distinguished Workforce Development Speakers
                 
  Advanced Memory Technologies: MRAM
Dr. Shu-Jen Han
Sr. Director, HFC Semiconductor Corp.
        Advanced Memory Technologies: RRAM
Dr. Zhiqiang Wei
Director, Rambus
   
                 
  Advanced Memory Technologies: ePCM/3D-PCM
Dr. Chieh-Fang Chen
CTO, Advanced Memory Semiconductor Corp.(AMT)