Symposium Chair:
| ** | to designate keynote talk - 30 min | |||
| * | to designate invite talk - 25 min | |||
| to designate regular talk - 15 min |
Monday, March 24, 2025 Shanghai International Convention Center
Session I: Lithograpy/Etch Joint Session (II & III)
Meeting Room: 3rd Floor Yellow River Hall
Session Chairs: Leo Pang / Zhongwei Jiang
| 13:00-13:05 | Opening Remarks |
| Leo Pang / Zhongwei Jiang | |
| **13:05-13:35 | From "Iso-Dense" Biasing to "Inverse Lithography:" Milestones in Optical Proximity Correction Technology |
| Michael Rieger, Synopsys (retired) | |
| **13:35-14:05 | Challenges and Latest Developments on Photo Resisters for Advanced Logic and Memory Technology Nodes |
|
Allen Chang, JSR |
|
| **14:05-14:35 | The Integration and Process Challenges and Solutions for Advanced Technology Nodes |
| David Xiao, Qianmo Microelectronics | |
Session II: Advanced Patterning
Meeting Room:3rd Floor Yellow River Hall
Session Chair: Qingjun Zhao
| *14:35-15:00 | Patterning Challenges and Perspectives Solutions in Advanced DRAM Technology Nodes |
| Hongbo Sun, Beijing Chaoxian Memory Research Institute | |
| *15:00-15:25 | The Pattern Solutions for GAAFET |
| Min Xu, Fudan University | |
| 16:25-16:40 | A Study of Minimum ISO-Dense Etching CD Bias Loading Performance on Advanced Logic Trench Process |
| Chia Lin Lu, Applied Materials | |
Tuesday, March 25, 2025 Shanghai International Convention Center
Meeting Room: 3rd Floor Yellow River Hall
Session III: FEOL/MOL Etching
Session Chair: Hai Cong
| 08:45-09:00 | Vertical and Horizontal Profile Control in STI Etch |
| Fansheng Wang, Applied Materials China | |
| *09:00-09:25 | Effects of ALE Capabilities and DC Pulsing in Microwave ECR Plasma on Etching Processes for Cutting-Edge Logic LSI |
| Masaru Izawa, Hitachi High-Tech Corporation | |
| 09:25-09:40 | Ultra-high Steep Ion Beam Etching by Employing Highly Dynamic Holder |
| Baosheng Du, Suzhou Youlun Vacuum Equipment Technology Co., Ltd. | |
| *09:40-10:05 | Pulsing Plasma Application for Advanced Dry Etch Process |
| Zhongwei Jiang, Beijing NAURA Technology Group Co., Ltd. | |
| 10:05-10:20 | Coffee Break |
Session IV: Memory Applications
Session Chair: Hai Cong
| *10:20-10:45 | Latest New Results and Developments of TSV for Advanced 3DIC Applications |
| Chao Lv, Beijing NAURA Technology Group Co., Ltd. | |
| 10:45-11:00 | SiC Trench Etch with Varying Aspect Ratio and Rounded Corner |
| Shijing Wang, Shanghai BangXin Semi Technology Co., Ltd. | |
| 11:00-11:15 | Modeling the Charging Effect on the Twisting Defects during High Aspect Ratio Etching of Dielectrics |
| Yuxuan Zhai, Institute of Microelectronics, Chinese Academy of Sciences | |
| 11:15-11:30 | DTI Depth Uniformity Tuning by Ra and Gas Distribution |
| Lei Sun, Applied Materials China | |
| 11:30-11:45 | Cleaning and Assessing Particles from Polymer Materials used in Semiconductor Manufacturing Tool |
| Ling Wang, Ferrotec Technology Development (Shanghai) Co. Ltd | |
| 11:45-12:00 | The Influence of Mandrel Materials on Graphic Transmission in Patterning Process |
| Jun Luo, Beijing NAURA Technology Group Co., Ltd. | |
| 12:00-13:30 | Lunch Break |
Session V: BEOL Etching
Session Chair: Qingjun Zhao
| *13:30-13:55 | Mechanism and Effect of 4-Level RF Pulsing on Etching Process in Advanced Node |
| Yang Ding, Advanced Micro-Fabrication Equipment Company Inc. | |
| 13:55-14:10 | Through-pitch CD Control with TIN Metal Hardmask Etch Process in Logic BEOL Patterning |
| Litian Xu, Beijing NAURA Technology Group Co., Ltd. | |
| 14:10-14:25 | Process Window Optimization for Gate Etch Process of 2D NAND |
| LiFei Sun, Lam Research | |
| 14:25-14:40 | Coffee Break |
Session VI: Wet Etch and other etching
Session Chair: Kaidong Xu
| *14:40-15:05 | Ion Beam Etching as a Patterning Solution for Memory Applications |
| Yuxing Yang, Jiangsu Leuven Instruments Co., Ltd. | |
| 15:05-15:20 | Study on Wet Alkaline Chemicals Etching of Hole Dummy Polysilicon in 3D Multi-Layer Structure |
| Jiao Jin, Beijing Superstring Academy of Memory Technology | |
| 15:20-15:35 | Novel IPA filtration technology for Advanced Wet Clean |
| Yoshiaki Yamada, Hangzhou Cobetter Filtration Equipment Co., Ltd. | |
| 15:35-15:50 | Investigating the Etch Performance of Zirconium-Based Photoresist for Direct Silicon Oxide Etching |
| Ahmad Hassan Siddique, Tsinghua University | |
| 15:50-16:05 | SiO2 Etch Rate Drift Investigation and Mitigation in an ICP Al Etch Chamber |
| Chenming Xu, Jiangsu Leuven Instruments Co., Ltd. | |
| 16:05-16:20 | Numerical Modelling on FFU Arrangements Optimization within Cleanroom during Preventive Maintenance |
| Chengxi Yao, Sungkyunkwan University | |
| 16:20-16:35 | Etching Surface and Etching Dimension Control for IGZO TFT Fabrication in 3D Memory Device |
| Zehuan Hei, Beijing Superstring Academy of Memory Technology | |
| 16:35-16:50 | Contact silicon etch challenge in IGBT manufacturing |
| Licheng Yang, Beijing NAURA Technology Group Co., Ltd. | |
| 16:50-17:05 | SiC Etch with Inductively Coupled Plasma for Power Device Applications |
| Haiyang Lv, Advanced Micro-Fabrication Equipment Company Inc. | |
| 17:05-17:20 | The PMOS Silicon Recess Process Control With Evolution of Trench Morphology |
| Fan Yu, Beijing NAURA Technology Group Co., Ltd. | |
| 17:20-17:35 | Analysis of Crucial Factors Influencing on Selectivity of SiGe/Si Stack Etching |
| Anton Kobelev, Suzhou STR Software Technology Co., Ltd. | |
| 17:35-17:50 | Atomistic Simulation of Dry Etching Process: Interactions between High-Energy Particles and Solid Surface |
| Yang Wang, Southwest Jiaotong University | |
| Poster Session: | |
| A Study of Wet Cleaning Methods for Tungsten High Aspect Ratio Dry Etch | |
| Chaoyang Guan, Beijing Superstring Academy of Memory Technology | |
| Metallic Contamination Control Challenges and VPD System Innovations for Hydrophilic Wafer Substrates | |
| Qiao Huang, Jiangsu Leuven Instruments Co., Ltd. | |
| ALE like Post-etch SiC Surface Treatment | |
| Chunxiang Guo, Jiangsu Leuven Instruments Co., Ltd. | |
| A Study of Wafer Arcing Issue in Dielectric Via Etching | |
| Taojun Zhang, Jiangsu Leuven Instruments Co., Ltd. | |
| Defect Engineering in 2D Materials Via Ion beam Irradiation | |
| Yuxin Yang, Jiangsu Leuven Instruments Co., Ltd. | |
| Process Engineering for Depth and N/P Loading Control in Polysilicon Gate Etching | |
| Chun Gao, Lam Research | |
| Time-Multiplexed Alternating Plasma Etching of Piezoelectric Materials | |
| Yuanwei Lin, Beijing NAURA Technology Group Co., Ltd. | |
| Unexpected Enhancement of Aluminum Etching Rate by Increased Nitrogen Concentration in Semiconductor Manufacturing | |
| Quanzhi Long, Zhejiang University | |
| The Influence of Post Etch N2 Treatment on TM Al Line Corrosion | |
| FanShun Meng, CanSemi Technology Inc. | |
| Study of the Influence of Surface Cleaning Process on SiGe Epitaxy Particle Defects | |
| Xuan Liu, Semiconductor Manufacturing North China (Beijing) Co.,Ltd. | |
| Pre-Epitaxy Backside Iron Contamination Leads to Cluster Cone Defect in Shallow Trench Isolation | |
| Zhanduo Bai, Semiconductor manufacturing International (Beijing) Corporation | |
| Improved Clean Approach of Post Dual-Damascene AIO Etch for Low-K Damage Reduction | |
| Yuying Liu, Lam Research | |
| Characterization Studies of the Sidewall Polymer after TIN Etching on Microchip Al Bondpads Using Capacitance Coupled Plasma (CCP) Etcher | |
| Xin Su, Advanced Micro-Fabrication Equipment Company Inc. | |
| Exploration of Boundary Conditions for Capacitor Etching Methods Under the Background of Characteristic Process | |
| Zhi Yao, Huahong Semiconductor (Wuxi) Co., Ltd. | |
| The Etching of SiO2/Mo-MoN/SiO2/TiN Stacks in an Inductively Coupled Plasma System | |
| Jiahui Sun, Beijing Superstring Academy of Memory Technology | |
| Undercut Profile Control of STI ETCH | |
| Jianhang Chen, Nexchip Semiconductor Corportion | |
| Comparison of 40MHz and 60MHz HF Frequencies in Dual-Frequency CCP for Low-k AIO Process | |
| Weiming Liu, Advanced Micro-Fabrication Equipment Inc. | |
| Etching Process Optimization of Deep Silicon Trench Sidewall Damage with High Aspect Ratio | |
| Ce Zhou, Huahong Semiconductor (Wuxi) Co., Ltd. | |
| A Dry Etch Defect Type Comb Particle Exploration and Solution | |
| Yang Wei, Nexchip Semiconductor Corporation | |
| The Influence of Surface Cleaning Process on Particle Defects of Selective SiGe Epitaxy | |
| Xuan Liu, Semiconductor Manufacturing North China (Beijing) Co.,Ltd. | |
| A Test Method to Evaluate Destructive Removal Efficiency (DRE) Used in Semiconductor Industry | |
| Yanling Xiong, EDWARDS | |
| Study on Tungsten (W) Filling Void Improvement with Chamfered Gate Profiles | |
| Pengfei Lyu, Lam Research | |
| Study on the Mechanism and Improvement of Top Notch Profile in Deep Trench Etching | |
| Yayu Hong, Lam Research | |
| BEOL Backside Clean Undercut Optimization by ZUC Chuck | |
| Haibo Liu, Lam Research | |
| Establishment of Active Area Etching using Lam RAP Process in CIS Application | |
| Xi Chen, Lam Research | |
| Simulation-Driven Optimization of STI Etching: A Systematic Approach to Defect Reduction | |
| Jianming Guo, Zhejiang University | |
| Galvanic Corrosion Study in Selective TiN Etch Chemistries | |
| Chien-Pin Sherman HSU, Avantor | |
| Evaluation and Improvements of TSV Distortion Characteristics in High Aspect Ratio TSV Etch | |
| Changhuo Liu, Peking University | |
| Fluorine Memory Effect Elimination in Cu BEoL Top Via Etching | |
| Sichao Zeng, Applied Materials China | |
| High-k Metal Gate Etch on Sym3Y HT Chamber | |
| Jie Wang, Applied Materials China | |
| Sym3™ Lid Temperature Control System for Uniformity Improvement | |
| Tianyuan Liu, Applied Materials China | |
| Profile Control of 28nm HKMG Poly Etch | |
| Xipeng Tong, Applied Materials China | |
| Process Challenges of High Transmission Photomask Tuning on TetraTM Mask Etch | |
| Long Men, Applied Materials China | |
| Taper Profile Control for MOSFET Gate Contact Etch on SuperE | |
| Wang Miao, Applied Materials China | |
| Profile Control of CIS BMG Tungsten Etching | |
| Le Jiang, Applied Materials China | |
| Deep Si Etch Process Optimization with AppliedPRO | |
| Fan Zhou, Applied Materials China | |
| Digital Tool AppliedPRO™ for Etch Process Development | |
| Kai Hu, Applied Materials China | |
| A Solution to HVCAP VIA Etch Polymer Residue | |
| Qunfeng Wen, Applied Materials China | |
| Profile Tuning on VTG Etch Development | |
| Zhang Weiqiang, Applied Materials China | |
| Edge Yield Improvement for DRAM Capacitor Middle MESH Layer Punch Process with Sym3Y | |
| Chunlong Qiu, Applied Materials China | |
| Hydrogen Bromide Usage in Polysilicon Etching Process | |
| Songtao Lv, Applied Materials China | |
| Roughness Improvement of DTI Process by Argon Introduction | |
| Difan Li, Applied Materials China | |
| CoSi2 Loss Study of Contact Etch on ProducerTM | |
| Bao Jing, Applied Materials China | |
| Digital Tool Applied Crossmatch™ for Chamber matching | |
| Jianjun Liao, Applied Materials China | |
| In-Situ Strip to Improve Defects for Al Etch | |
| Kairong Cui, Applied Materials China | |
| High Open Ratio Al Pad Etch Challenge and Solution | |
| Fan Chen, Applied Materials China | |
| SRAM VIA Chain Height Control in Dual Damascene Etch Process | |
| Ping Zheng, Applied Materials China | |
| ISO Dense CD loading in STI Etch | |
| Jimmy Fu, Applied Materials China | |
| DTC Etch in Packaging Device | |
| Lijun Shan, Applied Materials China | |
| Profile Control in PDL Etch | |
| Tongyao Zhao, Applied Materials China | |
| MTBC Improvement for Producer™ GT Passivation Etch | |
| Jing Cao, Applied Materials China | |
| Dual Damascus Pattern Depth Loading Challenges and Solutions | |
| Shuda Xu, Applied Materials China | |
| Improvement of TiN Hardmask Profile by N2 Gas | |
| Ziyue Xuan, Applied Materials China | |
| Ultra-low Bias Power CIS Deep Trench Isolation Etching | |
| Hanlin Cui, Applied Materials China | |
| Optimize Deep Trench Isolation Si etching with SF6 O2 Containing Plasma | |
| Longjie Yu, Applied Materials China | |
| Novel Approach to Address TiN HMO Top View Challenges | |
| Caili Lang, Applied Materials China | |
| O2 Plasma Descum on Residue Removal | |
| Jiajie Li, Applied Materials China | |
| Etch Profile Tuning Study on Small-sized Poly Gate | |
| Wenyi Tang, Applied Materials China | |
| Profile Optimization In Poly Gate Etch | |
| Lin Luo, Applied Materials China | |
| Residue Reduction in TIN HM ETCH | |
| Dongjiang Wang, Applied Materials China | |
| Approaches to Remove Ti-residue in TiN Hardmask Open Process | |
| Rishuai Zheng, Applied Materials China | |
| Advanced RF Pulsing in DRAM Bitline Etch Profile Control | |
| Zheng Ruan, Lam Research | |
| Application of Pulsing Plasma on DRAM Buried Wordline Microloading Control | |
| Kevin Yao, Lam Research | |
| Mandrel Etch Tuning for Imbalance Improvement in Reverse SADP | |
| Shipeng Gong, Lam Research | |
| Dry Etch Methods to Simplify Power Devices Top Corner Rounding and Poly Etch Back Process | |
| Stan Zhang, Lam Research | |
| Study on CD Slot Effect in TiN Hard Mask open Etch Process | |
| Haoran Wang, Lam Research | |
| Etch Profile Control of Alternate Oxide Tungsten Stack | |
| Rui Hu, Applied Materials China | |
| Tungsten Plug etchback Process in IGBT Manufacturing | |
| Haoran Song, Beijing NAURA Technology Group Co., Ltd. | |
| Poly-Si Cut Process for storage Node Contact Manufacturing in DRAM Memory | |
| Mengjiao Zhu, Beijing NAURA Technology Group Co., Ltd. | |
| Investigation of Silicon Oxide Thin Film Utilizing Plasma Enhanced Atomic Layer Deposition in ICP Etcher | |
| Li Zeng, Beijing NAURA Technology Group Co., Ltd. | |
| The Process of Etching High Aspect Ratio SiB at High Temperature | |
| Xuehua Wang, Beijing NAURA Technology Group Co., Ltd. | |
| Micro Loading Issue Improvement in Poly Gate Etch | |
| Yiman Ma, Beijing NAURA Technology Group Co., Ltd. | |
| Isolation SiN Etch Strategy for OLED Pixel Definition Layer Manufacturing | |
| Bin Wang, Beijing NAURA Technology Group Co., Ltd. | |
| LWR improvement in Self-aligned Patterning Process Involved in 193nm Photoresist Treatment | |
| Guangzhao Yuan, Beijing NAURA Technology Group Co., Ltd. | |
| The Influence of Strip Step on Punch Process | |
| Yu Hao, Beijing NAURA Technology Group Co., Ltd. | |
| Carbon Hardmask Etching Profile Control using Cyclic Deposition and Etching | |
| Wencong Wei, Beijing NAURA Technology Group Co., Ltd. | |
| Bridge Defect Issue Solution in Trilayer HM Etch | |
| Zhe Wang, Beijing NAURA Technology Group Co., Ltd. | |
| Depth Uniformity of Silicon and Dielectric Trenches Etching for the Burried Wordline of Novel Memory | |
| Teng Zhang, Beijing NAURA Technology Group Co., Ltd. | |
| IGZO Film Etching Technique using BCl3 Plasma Following Diluted Hydrofluorine Solution | |
| Run Zhang, Beijing NAURA Technology Group Co., Ltd. | |
| Array Center and Corner Loading Improvement in R-SADP | |
| Shun Yang, Beijing NAURA Technology Group Co., Ltd. | |
| Si Top Corner Damage-free Etch Process for Shallow Trench Isolation of Beyond the 22nm Node | |
| Yingjie Wang, Beijing NAURA Technology Group Co., Ltd. | |
| Deep Silicon Etching Process for Optimizing Sidewall Morphology | |
| Yiming Ma, Beijing NAURA Technology Group Co., Ltd. | |
| The Optimization of depth Micro-loading in Shallow Trench Isolation Etching for Dual-channel Structure | |
| Junsheng Ma, Beijing NAURA Technology Group Co., Ltd. | |
| Through-Silicon Via Etch by SF6/O2 Chemistry with ICP Etcher | |
| Dong Li, Beijing NAURA Technology Group Co., Ltd. | |
| Optimization of the Profile Loading in Dummy Poly Gate Etch | |
| Ruiping Zhu, Beijing NAURA Technology Group Co., Ltd. | |
| Chamber Conditions Control with Waferless Auto Clean Strategy in BEOL Aluminum Metal Etching Process | |
| Guohui Jia, Beijing NAURA Technology Group Co., Ltd. | |
| Study of Poly-Si Etch Rate Sensititivity with Pulsing Mode of RF Powers for Soft-landing Step in Gate Patterning Process | |
| Chao Xu, Beijing NAURA Technology Group Co., Ltd. | |
| Self-Limited Behavior Study on Dielectric Quasi-Atomic Layer Etching for Selectivity Achievement | |
| Xiaoxia Meng, Advanced Micro-Fabrication Equipment Company Inc. | |
| The Investigation on Partial Via Etch Of Low-K In MHM AIO Process | |
| Ruolan Ma, Advanced Micro-Fabrication Equipment Company Inc. | |
| Mechanism and Model of Line Wiggling/Asymmetric Trench profile and Effective Solutions | |
| Mimi Dai, Advanced Micro-Fabrication Equipment Company Inc. | |
| An Approach to Improve Distortion With High-Aspect-Ratio Cryogenic Etching Using Boron-Containing Gases | |
| Yue Wei, Advanced Micro-Fabrication Equipment Company Inc. | |
| The Effects of Power and Chemistry on High-aspect-ratio Contact Profile | |
| Jianqiu Hou, Advanced Micro-Fabrication Equipment Company Inc. | |
| Optimization of the Uniformity of the Contact Resistance (RC) of the Via By the Collocation of Gas Parameters In AIO Etching | |
| Gui Cong, Nexchip Semiconductor Corporation | |
| A Wafer Temperature Control System for Advanced Technology Node Manufacturing | |
| Xiao Wei, Advanced Micro-Fabrication Equipment Company Inc. | |