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Zhufei Chu received the B.S. degree in electronic engineering from Shandong University, Weihai, China, in 2008 and the M.S. and Ph.D. degrees in communication and information system from Ningbo University, Ningbo, China, in 2011 and 2014, respectively. He was a Postdoctoral Fellow at the \'Ecole Polytechnique F\'ed\'ederale de Lausanne (EPFL) during 2016 to 2017. He is currently a Professor with Ningbo University, Ningbo, China.
He serves as the proceedings chair (2019-2021) and finance chair (2022-2023) of the international workshop on logic and synthesis (IWLS), and also technical program committee members for design automation conference (DAC), IWLS, and international conference on VLSI design (VLSID).
He is actively maintaining the logic synthesis framework ALSO (https://github.com/nbulsi/also).
His current research interests include the many aspects of logic synthesis and its applications.
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