|
Feng Zhang received the BS from Beijing Institute of Technology in 2000, MS and PhD degrees in institute of
Microelectronics of Chinese Academy of Sciences (IMECAS), Beijing, China, in 2002 and 2005, respectively. He was a professor with institute of Microelectronics of Chinese academy of sciences, Beijing, and he once works on the design of high speed bus for the loongson 64bits cpu for 5 years from 2005 to 2010 in Institute of Computing Technology of Chinese Academy of Sciences (ICTCAS). And in 2010, he joined the Microelectronics of Chinese academy of sciences. His research interests include computing-in-meomory, memory circuit, low-power high-speed I/O links, low-power low-jitter clock synthesis/recovery circuits (PLL and DLL) , and low-power high speed circuit design.
|
