 |
Dr. Masanori Hashimoto
Professor |
|
Masanori Hashimoto received the B.E., M.E., and Ph.D. degrees in communications and computer engineering from Kyoto University, Kyoto, Japan, in 1997, 1999, and 2001, respectively. Now, he is a Professor in the Department of Communications and Computer Engineering, Kyoto University. His current research interests include VLSI design and CAD, especially design for reliability, soft error characterization, timing and power integrity analysis, reconfigurable computing, and low-power circuit design. He served as the TPC chair for ASP-DAC 2022 and MWSCAS 2022. He was/is on the Technical Program Committees of international conferences, including DAC, ICCAD, DATE, ITC, Symposium on VLSI Circuits, and IRPS. He serves/served as the Editor-in-Chief for Microelectronics Reliability and an Associate Editor for IEEE Trans. VLSI Systems, IEEE Trans. CAS-I, and ACM Trans. Design Automation of Electronic Systems. |
|
