Max.Cai 蔡维伽
Specialist Bonder Equipment, SUSS MicroTec (Shanghai) Co., Ltd
苏斯中国, 键合设备技术专家

个人简介 / Biography

Max.Cai is bonder equipment specialist of SUSS MircoTec. He joined SUSS on 2006, and since then focused on wafer bonding technology. He worked with SUSS global wafer bonding specialist team to support semiconductor foundries, institutes and universities in China, helped customers to settle and develop their wafer bonding technology in various of different applications for decade.

蔡维伽先生目前就任SUSS MicroTec公司的键合技术专家一职。自2006年加入SUSS以来，他便一直专注于晶圆键合工艺。十多年来，他和SUSS全球晶圆键合专家团队，与国内多家半导体工厂、研究所及大学共同工作，帮助客户研究，发展及完善晶圆键合工艺在半导体制造多个领域的应用。

摘要 / Abstract

Hybrid bonding as a way to bond two substrates by means of a dielectric layer while at the same time creating metallic interconnects between both substrates has been attracted increasing attention recently in the scope of 3D integrated packaging. When it comes to 3D-stacked ICs, restrictions derived from TSV- and yield processing limits become apparent. Especially the maximum achievable yield becomes critical at increased die stacking levels (KGI, or known-good die problem). Although this problem can be overcome by die-to-wafer (D2W) hybrid bonding, the amount of dies per 12” wafer (as a function of die size and spacing) quickly challenges maximum throughput considerations. A potential way out of this is collective D2W bonding, where a 12” carrier wafer is populated with the single (good) dies via die pick and place procedure and collectively hybrid bonded to the target wafer in a single step. In the scope of this presentation, some exemplary results of 300mm hybrid bonding will be presented, and also with explanation of challenges to achieve high yielding die-to-wafer bonding with micron range with respect to die overlay and process flow.

混合键合，是通过介电层将基片连接，并同时实现基片间金属互联的工艺方式。在3D集成封装领域，这种键合方法越来越受到关注。TSV工艺的良率问题是三维堆叠集成电路工艺中的一大难题，尤其是在增加堆叠层数后，良率的问题愈显突出。这个问题现在有望通过芯片-晶圆片（D2W）的混合键合方式得以解决。但由于12寸晶圆片上将集成许多个芯片（数量取决于芯片及芯片间隙大小），所以如果每次堆叠全部都只采用D2W的方式实现，受到高精度贴片速度的影响，产能产率又将成为另一个必须考虑的问题。而可以同时解决这些问题的一种可行方法，是采用集成式芯片-晶圆的混合键合：即在12寸的载片上先以D2W贴片的作业方式布置所需的芯片（经挑选过的优良芯片），然后再采用集成式混合键合（W2W）将集成了所有芯片的载片一次性与目标晶圆片结合。本报告将介绍可用于12寸晶圆集成式混合键合的详细工艺，并结合实验数据和结果，展示并说明芯片-晶圆集成式混合键合的工艺流程，以及在亚微米级芯片对准叠层时，如何保证芯片、晶圆间对准精度，以提高良率等关键问题。