** to designate keynote talk Sponsored by:
* to designate invite talk
  to designate regular talk

Session I: Integration - FEOL

Opening Remarks
Beichao Zhang
**Cutting-edge epitaxial processes of group IV materials for advanced technology nodes
Andriy Hikavyy, Imec
**Advanced Transisitor Structure Exploration by DTCO method
Shaofeng Yu, Fudan University
Increasing the Post Halo Implantation Anneal Temperature for the Effective Improvement of Threshold Voltage Roll-off Induced by the Unique Non-uniform Boron Diffusion from the Embedded Source/Drain
Runling Li, Fudan University
Investigation of the baking process on the substrate interface and the epitaxial growth
Zhenya Xu, Shanghai IC R&D Center
INVESTIGATION OF NANOSHEET DEFORMATION DURING CHANNEL-RELEASE IN GATE-ALL-AROUND NANOSHEET TRANSISTORS
Jingwen Yang, Fudan University
 

Session II: Thin Film FE/BE (1)

**Pinch off Ultrathin Film Plasma CVD Deposition Process and Material Technology for Nano-device Air Gap/Spacer Formation
Son Nguyen, IBM Research
The application of Lau’s Schottky-Poole-Frenkel theory to distinguish leakage current mechanisms in high-k MIM capacitors by pattern recognition
Wai Shing Lau, Nanyang Technological University
Minimizing residual stress of aluminum nitride (AlN) thin films using multi-step deposition of DC pulsed sputtering
Wei-Lun Chen, National Central University
 

Session III: Thin Film FE/BE (2)

**Dielectric CVD to address Challenges for Logic, Memory and Packaging Integration
David Chu, Applied Materials
*SILICON PHOSPHORUS PROCESS UNIFORMITY IMPROVEMENT STUDY IN ADVANCED NODE
TU HUOJIN, Shanghai Huali Integrated Circuit Corporation
The study of SiGe channel formation for FDSOI
Lan Jiang, Shanghai Huali Integrated Circuit Corporation
 

Session IV: Integration - BEOL/Packaging

*Novel Barrier and Integration Flow for Low Resistance Interconnects
Lee Brogan, Lam Research
Low-temperature Die to Glass Wafer Bonding Based on Au-Au Atomic Diffusion
Shuchao Bao, Xiamen University
 

Session V: Thin Film-ALD

*Proliferation of ALD technology in the nano device era (9:30-10:00, June 20, Microsoft Teams Meeting)
Jerry Chen, ASM
*ALD applications in advanced nodes
Weiming Li, Jiangsu Leadmicro Nano-Equipment Technology Ltd.
Achieving 100% Gap-Fill for Deep Trenches through Fundamental Understanding of SiO2 PEALD Mechanism
Toshihisa Nozawa Piotech Inc.
The effect of interfacial and bulk free energies on the leakage current vs voltage characteristics of high-k MIM capacitors prepared by atomic layer deposition
Wai Shing Lau, Nanyang Technological University
Enhanced Fill of Tungsten in 3D NAND Wordline: A View of Molecular Diffusion
Xin Gan, Lam Research
 

Session VI: Advanced Materials and Process

*2D material and applications
Zhihong Chen, Purdue University
A Hybrid Modelling Approach for the Digital Twin of Device Fabrication
Dong Ni, Zhejiang University
 

Poster Session:

Effects of coil surface current density on plasma characteristics in a PECVD chamber
Jiangjie Zeng, Jiangsu Normal University
Metal Gate inline Vt Variation Improvement for Advanced Technology
Canyang Xu, Applied Materials
Aluminum Gap Fill Improvement For 28 HKMG Process
Shihao Wang, Shanghai Huali Integrated Circuit Corporation
AMAT High Throughput HDPCVD Ultima XT Introduction
Tengfei Zhang, Applied Materials China
Research on the oxidation behavior of Titanium nitride thin films and Resistance simulation
Xiaotong Zhang, Shanghai Huali Integrated Circuit Corporation
Improvement of Aluminum Diffusion In HKMG Process
Xiaoyang Xi, Shanghai Huali Integrated Circuit Corporation
HIGH-K ELECTRICS HFO2 DEPOSITION EFFECT ON SI-SUB OXIDATION BEHAVIOR
Junjun chen, Shanghai Huali Integrated Circuit Corporation
RESEARCH ON THE BACKSIDE PRESSURE OF TANTALUM OXIDE ANTI-REFLECTIVE LAYER IN BSI
Shenzhou Lu, Shanghai Huali Microelectronics Corporation
ALUMINUM NITRIDE BASED ETCH STOP LAYER TO ELIMINATE ILD OVER-ETCH ISSUES IN LOGIC BEOL VIA PATTERNING
Jiang Yu, Lam Research
INVESTIGATION OF 14 NM CONTACT TUNGSTEN GAP-FILLING PERFORMANCE
Xiaofang Wang, Shanghai Huali Integrated Circuit Corporation
Improve SADP/SAQP ALD SIN spacer uniformity by patterned dummy
Xin Xu, Shanghai IC R&D Center
Decoupled-plasma Oxidation Process to Improve ALD Oxide Film Quality as IO Device Gate Oxide
Xin Xu, Shanghai IC R&D Center
Influence of Material Manufacturing Method on the Growth of Aluminum Fluoride on Heater surface in Plasma Enhanced Chemical Vapor Deposition
Xiaochen Wang, Piotech Inc.
The influence of O3/TEOS and He/TEOS flow ratio on gap filling of shallow trench isolation filled with silicon oxide in sub-atmospheric chemical vapor deposition
Zhenjie Liu, Piotech Inc.
A Novel Approach to Achieve Extreme Low Vt for NMOS in Advanced FinFET
Subo Cao, Applied Materials
Study on the adhesion between amorphous silicon thin films prepared by PECVD and precondition silicon oxide
Huailei Shi, Piotech Inc.
Impact of SiOx Substrate on PECVD Amorphous Silicon Film Edge Peeling Defect
Cherry Xu, Lam Research
Effects of stacked Al2O3 / HfO2 films deposited in Deep Trench Isolation on White Pixels Noise
Qixin Wu, Semiconductor Manufacturing International Corporation
Uniformity optimization and defect reduction of Precision TEOS process
Junmei Li, Applied Materials
Thick Epi Process Development on CENTURA ATM Epi System
Xingxing Liu, Applied Materials
Applied Materials® Impulse PVD SiN for DRAM Bitline Rs Reduction
Jiachuan Wu, Applied Materials
Review and Thermo-fluids Numerical Modeling on Electrostatic Chuck
Peng Feng, Piotech
EPI JIT function balance wafer process parameter
Junyi Hu, Applied Materials
HARP Liner Penetration in Planar NAND Production
Songtao Lv, Applied Materials
Property and profile fine tune in an ICEFill tungsten deposition process
Kevin Tian, Lam Research
LHPC Contribution to Oxide Thickness
Yuning Song, Applied Materials
Advanced carbon hardmask for 3D NAND: challenges and solutions
Pengyi Zhang, Lam research
Adaptive Preheat Application on RPO Process
Zhipeng Luo, Applied Materials
FILM PROPERTY ANALYSIS BY FTIR ON ULK FILM DEPOSITION AND UV CURING PROCESS
Xinchen Cai, Piotech Technology Co., LTD.
Inhibition-Control-Enhancement Fill (ICEFill™) Dielectric PEALD for HAR Structure Gap Fill
Xin Liu, Lam Research
Analysis of Influence to Gate stack of EEPROM Using Cl doped Re-Oxidation
Hong Zhang, School of Microelectronics, Fudan University, Shanghai
TiSi Anneal Process Improvement in Advanced CMOS Technology
Qi Zhang, Applied Materials (China)
Optimization of Defect and range for Thick TEOS Oxide Deposition in 3D NAND Application
Chujia Huang, Applied Materials (China), Inc.
Excellent Copper Gap Fill Performance of AMAT Amber Cu
Zhen Chen, Applied Materials (China), Inc. China
The effect of STI divot on planner logic device performance study
Zhenchao Sui, Semiconductor Manufacturing North China (Beijing) Corporation
Solution and Mechanism for Producer GT TEOS WER Mismatch
Aoju Li, Applied Materials
Solution for Solving the Silane Chamber RPS Path Powder
Haipeng Chen, Applied Materials
Dynamic Planarity Control for Auto and Independent Hot Leveling
Haipeng Chen, Applied Materials
Range improvement in staircase application in 3D NAND
Zaigong Wen, Applied Materials (China), Inc.
E-chuck implement in APF for 3D NAND application
Wentao Ye, Applied Materials
ESC Application on Producer GT CVD System for High Bow Wafer Handling
Guowei Zhang, Applied Materials
300mm Wafer Laser Anneal Process Development for Applications of Multiple Process Condition in Different Zones on Single Wafer
Xiaoxu Kang, Shanghai ICR&D Center
Conformal Si STI Liner Epitaxy for Advanced DRAM
Shiming Liu, Applied Materials
Void Free Process Development for Node Contact Gap Fill in DRAM
Guangyao Shen, Applied Materials
I/O ALD Gate-Ox with Plasma Treatment in Advanced Node
Gengwu Ji, Applied Materials China
Post Deposition Purge Optimization for PECVD Process Robustness in Advanced Node
Chunyuan Zhou, Lam Research
A Strategy of Eliminating Salicide Block Film Bubbles
Chao Bao, Huahong Semiconductor (WUXI) Limited
An Achievement of Low Resistance Non-salicide CT on Active Area
Bingquan Wang, SMIC
TaN Based Metal-Insulator-Metal Capacitor with Excellent Long-termReliability
Linlin Zhang, Huahong Semiconductor
A Strategy of Eliminating Silicon Dislocation in 55nm Node Technology
Chao Bao, Huahong Semiconductor (WUXI) Limited
12-inch 90-nm BCD Process Optimization Reducing Wafer Edge LDMOS Leakage
Guangyuan Lu, Huahong Semiconductor