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Hongming PAN 潘宏明 北京晶亦精微科技股份有限公司，CMP技术应用与开发经理 |
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讲师简介 / Speaker Bio 担任北京晶亦精微科技股份有限公司CMP技术应用与开发经理，在半导体集成电路制造行业执业多年，在传统硅基成熟与先进工艺平台和第三代半导体SiC衬底以及器件制造平坦化工艺开发方面有着丰富的实践经验。 摘要 / Abstract The third generation semiconductor SiC has become an excellent material for manufacturing power semiconductors with wide band gap (3eV), breakdown field strength (3~5mV/cm), high thermal conductivity (4.9W/cm*K), high working junction temperature and other characteristics. With the global consumption demand for new energy vehicles, the SiC industry chain has become a new market with rapid growth. According to YOLE, the power SiC market size will grow at a CAGR of ~24% from 2023 to 2029. The manufacture of reliable and efficient power SiC devices requires a good quality substrate to reduce the potential risk of reliability caused by interface defects between SiC substrate and epitaxial layer. In this report, chemical mechanical planarization process was carried out on the substrate after cutting, grinding and polishing to further remove the surface damage and obtain a smooth and flat surface. After testing, the surface roughness of Si side Ra ≤0.1nm, the (<5mm) macro scratch counts ≤2, and the (>0.3um) particle counts ≤20. |
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