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March 20-22, 2019
Shanghai New International Expo Centre

Panel Discussion

As technology is scaling down, to develop a high yield manufacturable process become more and more difficult. This panel session will discuss on what are the major yield killers and the key technology solutions to build a reliable 14nm to 7nm logic process. Especially focus on how to solve those difficult issues of high K metal gate, FinFET, ultra-low K BEOL and advanced embedded memory technologies. In this panel, we invite several world renowned exporters to cover thin film, etching, litho, CMP, integration, device, package and circuit design issues to give you a global view of what are those most difficult challenges and what are the solutions to deliver a high yield manufacturable process.

 

Meeting Room: 3rd Floor Yellow River Hall

Date: March 11, 17:00-18:30 What are the yield killers and the solutions of 14nm to 7nm node technologies?

Moderator: Dr. Hsiang-Lan Lung

 

 

Panel Members:

Dr. Huiming Bu Dr. Rich Wise Dr. Kafai Lai
Director, Si Integration and Device, IBM Managing Director, Lam Research RSM, Fellow of SPIE and Fellow of OSA, IBM
     

Dr. Ying Zhang Dr. Min-Hwa Chi Dr. Owen Hu
VP of Research, AMAT Sr. VP, SMIC Deputy Director, GF