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March 14-16,2018
Shanghai New International Expo Centre

Symposium V: CMP and Post-Polish Cleaning



Symposium V: CMP and Post-Polish Cleaning


Symposium Committee

Dr. Yuchun Wang
Chair

Anji Microelectronics, China

Dr. Jingxun Fang
Co-Chair


Huali Microelectronics Corporation, China

Dr. Kuochun WU
Co-Chair


Cabot Microelectronics, Asia

Dr. Paul-Chang Lin
Member

SMIC, China

Dr. David HUANG
Member

Pall Inc., USA

Dr. Jin-Goo PARK
Member

Hanyang University, Korea

Dr. Kailiang ZHANG
Member

Tanjin University of Science & Technology, China

Dr. Mahadevaiyer KRISHNAN
Member

IBM, USA

Dr. Shoutian Li
Member

Anji Microelectronics, China

Dr. XinChun Lu
Member

Tsinghua University , China

Dr. Wen-Chiang Tu
Member

Applied Materials, USA


Symposium V: CMP and Post-Polish Cleaning

CMP has been an enabling technology in IC manufacturing since early 1990s, and the technology continues to play critical roles with increasing applications. Our CMP knowledge at the fundamental level often reveals refreshing insights as we approach the sub-20nm or even sub-10nm technology node in the shrinking geometry while we also stack up the IC in the 3D dimension. CSTIC CMP session (Session V) is a forum for the scientists and engineers to share all the aspects of CMP fundamentals, the latest progress in CMP equipment, CMP related materials, new CMP applications, process optimization, reliability and yield improvement. Topics include but are not limited to the following:
1. CMP fundamentals and modeling
2. Equipment and metrology for process control and defect reduction
3. Consumables including abrasive particles, slurries, pads, conditioning disks, CMP cleaning chemicals, and brushes, etc
4. CMP and post CMP cleaning process optimization in front end, middle end, back end, and various substrates such as silicon wafers and wafer reclaiming.
5. Emerging applications for 3D IC’s such as FinFET, 3D NAND, hybrid bonding, TSV, MEMS, and advanced packaging