|
Sridhar Srinivasan is currently a Principal Engineer at Mentor Graphics, a Siemens Company. He has about 25 years of experience in the EDA industry, having worked in various areas of IC design flow including static timing analysis, timing driven routing, physical verification (DRC, LVS, and DFM) and circuit verification. In the last 10 years, he has worked as the architect of a leading reliability verification tool framework which is widely used to verify circuit reliability. The tool is used to verify reliability issues related to Electrical Over Stress (EOS), ESD, EM, etc. He has multiple patents and publications in peer reviewed conferences. He has a Masters degree in EE from Portland State University and Bachelors in EE from Coimbatore Institute of Technology, India.
|
